ABSTRACT
This paper present area efficient layout design for static RAM memory using 45nm VLSI technology VLSI Technology includes process design, trends, chip fabrication, real circuit parameters,circuit design, electrical characteristics, configuration building blocks, switching circuitry, translation onto silicon, CAD, practical experience in layout design. The proposed static RAM memory is designed is designed using 45 nm CMOS/VLSI technology with microwind 3.1. This software allows designing and simulating an integrated circuit at physical description level. The main novelties related to the 45 nm technology are the high-k gate oxide, metal gate and very low-k interconnect dielectric. The effective gate length required for 45 nm technology is 25nm. Low Power (0.2microwatt), high speed static RAM of frequency 5GHz ,area efficient chip is designed using 45 nm VLSI technology.
Keywords: Static RAM, 45nm, VLSI technology, Low power, 16 bit.
